Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-01
2008-04-01
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S233000, C438S257000, C438S201000, C438S241000, C438S624000, C257SE21613, C257SE21682, C257SE21691
Reexamination Certificate
active
11454233
ABSTRACT:
A method of manufacturing a flash memory device, including the steps of forming a gate on a semiconductor substrate in which a cell region, a source selection line region, and a drain selection line region are defined and then forming spacers on sidewalls of the gate; depositing a nitride film and a first interlayer insulating film on the entire structure, etching a region of the first interlayer insulating film to form a source contact hole, forming a conductive film on the entire structure to bury the source contact hole, and polishing the conductive film; forming a second interlayer insulating film on the entire structure, and then etching the second and first interlayer insulating films and the nitride film using a mask through which regions in which a cell region and a drain contact will be formed are opened; and, forming a polysilicon layer on the entire structure.
REFERENCES:
patent: 6936885 (2005-08-01), Shin et al.
patent: 2006/0245245 (2006-11-01), Mokhlesi et al.
patent: 1020070002464 (2007-01-01), None
patent: 1020070005074 (2007-01-01), None
Fourson George
Hynix / Semiconductor Inc.
Maldonado Julio J
Marshall & Gerstein & Borun LLP
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