Methods of forming field effect transistors

Details Methods of forming field effect transistors Methods of forming field effect transistors

2007-08-28

2007-08-28

Baumeister, B. William (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S283000, C438S300000, C257S330000, C257SE21410

Reexamination Certificate

active

10925100

ABSTRACT:
A mass of material is formed over a semiconductor substrate. Semiconductive material is formed laterally proximate the mass of material. A space is provided laterally between the mass of material and the semiconductive material. The space comprises an outermost portion and a portion immediately adjacent thereto. The outermost portion has a maximum lateral width which is greater than that of the adjacent portion. Gate dielectric material and conductive gate material are formed within the space. The gate dielectric material and the conductive gate material in combination fill the adjacent portion of the space but do not fill the outermost portion of the space. At least the conductive gate material is etched from at least a majority of the outermost portion of the space. Source/drain regions are formed operatively proximate the conductive gate material and the semiconductive material is used as a channel region of the field effect transistor.

REFERENCES:
patent: 5780343 (1998-07-01), Bashir
patent: 6297531 (2001-10-01), Armacost et al.
patent: 6387758 (2002-05-01), Yu et al.
patent: 6624032 (2003-09-01), Alavi et al.
patent: 6756273 (2004-06-01), Hadizad et al.
patent: 6969644 (2005-11-01), Visokay et al.
patent: 2003/0122187 (2003-07-01), Yoo
patent: 2006/0258071 (2006-11-01), Sandhu et al.

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