Method of fabricating semiconductor side wall fin

Details Method of fabricating semiconductor side wall fin Method of fabricating semiconductor side wall fin

2007-09-04

2007-09-04

Smith, Matthew (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S401000, C257SE21090, C257SE21461, C257SE21562, C438S156000

Reexamination Certificate

active

10867772

ABSTRACT:
A double gated silicon-on-insulator (SOI) MOSFET is fabricated by forming epitaxially grown channels, followed by a damascene gate. The double gated MOSFET features narrow channels, which increases current drive per layout width and provides low out conductance.

REFERENCES:
patent: 3876480 (1975-04-01), Davidsohn et al.
patent: 4716128 (1987-12-01), Schubert et al.
patent: 4996574 (1991-02-01), Shirasaki
patent: 5049521 (1991-09-01), Belanger et al.
patent: 5346834 (1994-09-01), Hisamoto et al.
patent: 5391506 (1995-02-01), Tada et al.
patent: 5466621 (1995-11-01), Hisamoto et al.
patent: 5494837 (1996-02-01), Subramanian et al.
patent: 5545586 (1996-08-01), Koh
patent: 5581101 (1996-12-01), Ning et al.
patent: 5593928 (1997-01-01), Lee
patent: 5612230 (1997-03-01), Yuzurihara et al.
patent: 5675164 (1997-10-01), Brunner et al.
patent: 5773331 (1998-06-01), Solomon et al.
patent: 5885876 (1999-03-01), Dennen
patent: 6118161 (2000-09-01), Chapman et al.
patent: 6165829 (2000-12-01), Gil
patent: 6177299 (2001-01-01), Hsu et al.
patent: 6310367 (2001-10-01), Yagishita et al.
patent: 6383892 (2002-05-01), Colt, Jr.
patent: 6458662 (2002-10-01), Yu
patent: 6483156 (2002-11-01), Adkisson et al.
patent: 6660596 (2003-12-01), Adkisson et al.
patent: 6768158 (2004-07-01), Lee et al.
patent: 7064019 (2006-06-01), Fried et al.
patent: 7192876 (2007-03-01), Mathew et al.
patent: 2003/0006410 (2003-01-01), Doyle
patent: 2003/0178670 (2003-09-01), Fried et al.
patent: 196 33 914 (1997-08-01), None
patent: 11-233774 (1999-08-01), None
patent: 11-251579 (1999-09-01), None
patent: WO 00/30181 (2000-05-01), None
D.A. Soderman; “DMOS/SOS Field-Effect Transistor Device & Process”; IBM Technical Disclosure Bulletin: vol. 23, No. 4; Sep. 1980; pp. 1530-1532.
Fischer & Kuhne; “Critical Dose for Strained Layer Configurations”; pp. 141-146.
Godbey et al.; “Selective Removal of Si1−xGexfrom (100 Si Using HNO3and HDF”; J. Electrochem Soc., vol. 139, No. 10, Oct. 1992: pp. 2943-2947.
K.D. Hobart et al.; “Ultra-Cut: A Simple Technique for the Fabrication of SOI Substrates with Ultra-Thin (<5 nm) Silicon Films”; IEEE International SOI Conference, Oct. 1998, pp. 145-146.
F. Wang et al.; “Highly Selective Chemical Etching of Si vs. Si1−xGexUsing NH4OH Solution”; J. Electrochem. Soc., vol. 144, No. 3, Mar. 1997; pp. L37-L39.
L. Vescan et al.; “Facet Investigation in Selective Epitaxial Growth of Si and SiGe on (001) Si for Optoelectronic Devices”; J. Vac. Sci. Technol. B. 16(3), May/Jun. 1998; pp. 1549-1554.
H-S Wong et al.: “Self-Aligned (Top and Bottom) Double-Gate MOSFET with a 25 nm Thick Silicon Channel”; 0-7803-4100-7/97/$10.00; 1997, IEEE; pp. 16.6.1-16.6.4.
H. Takao et al.; “High Performance CMOS Surrounding Gate Transistor (SGT) for Ultra High Density LSIs”; CH2528-8/88/0000-0222/$1.00; 1988 IEEE; pp. 222-223.
European Search report dated Jul. 16, 2004.
Su et al. XP-001003454 “New planar self-aligned double-gate fully-depleted P-MOFEST's using epitaxial lateral overgrowth (ELO) and selectively grown source/drain (S/D)” 2000 IEEE International SOI conference Oct. 2000.

Affiliated with

Also associated with

Rating

Method of fabricating semiconductor side wall fin does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating semiconductor side wall fin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating semiconductor side wall fin will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3798768