Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-09-04
2007-09-04
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S254000, C438S712000, C257SE21038, C257SE21206
Reexamination Certificate
active
11162662
ABSTRACT:
A structure fabrication method. The method comprises providing a structure which comprises (a) a to-be-etched layer, (b) a memory region, (c) a positioning region, (d) and a capping region on top of one another. Then, the positioning region is indented. Then, a conformal protective layer is formed on exposed-to-ambient surfaces of the structure. Then, portions of the conformal protective layer are removed so as to expose the capping region to the surrounding ambient without exposing the memory region to the surrounding ambient. Then, the capping region is removed so as to expose the positioning region to the surrounding ambient. Then, the positioning region is removed so as to expose the memory region to the surrounding ambient. Then, the memory region is directionally etched with remaining portions of the conformal protection layer serving as a blocking mask.
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Furukawa Toshiharu
Hakey Mark C.
Holmes Steven J.
Horak David V.
Koburger, III Charles W.
Ghyka Alexander
Sabo William D.
Schmeiser Olsen & Watts
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