Method of manufacturing EEPROM cell

Details Method of manufacturing EEPROM cell Method of manufacturing EEPROM cell

2007-07-03

2007-07-03

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21690

Reexamination Certificate

active

11096038

ABSTRACT:
A method of manufacturing an EEPROM cell includes growing a first oxide layer on a semiconductor substrate; forming a first conductive layer on the first oxide layer; forming a first conductive pattern and a tunneling oxide layer by patterning the first conductive layer and the first oxide layer, the tunneling oxide layer being disposed under the first conductive pattern; forming a gate oxide layer on sidewalls of the first conductive pattern and the substrate and forming a second conductive pattern on both sides of the first conductive pattern; forming a conductive layer for a floating gate by electrically connecting the first conductive pattern to the second conductive pattern; forming a coupling oxide layer on the conductive layer for the floating gate; forming a third conductive layer on the coupling oxide layer; and forming a select transistor and a control transistor by patterning the third conductive layer, the coupling oxide layer, and the conductive layer for the floating gate. The select transistor is spaced apart from the control transistor. The select transistor, which is formed on the tunneling oxide layer, includes a gate stack formed of a select gate, a first coupling oxide pattern, and a first floating gate, and the control transistor includes a gate stack formed of a control gate, a second coupling oxide pattern, and a second floating gate.

REFERENCES:
patent: 5541129 (1996-07-01), Tsunoda
patent: 5981340 (1999-11-01), Chang et al.
patent: 6316293 (2001-11-01), Fang
patent: 6506646 (2003-01-01), Miyagi
patent: 10-0267870 (2000-10-01), None

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