Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-07-10
2007-07-10
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S212000, C438S270000, C438S287000, C438S424000
Reexamination Certificate
active
10738783
ABSTRACT:
Memory devices, arrays, and strings are described that facilitate the use of NROM memory cells in NAND architecture memory strings, arrays, and devices. NROM NAND architecture memory embodiments of the present invention include NROM memory cells in high density vertical NAND architecture arrays or strings facilitating the use of reduced feature size process techniques. These NAND architecture vertical NROM memory cell strings allow for an improved high density memory devices or arrays that can take advantage of the feature sizes semiconductor fabrication processes are generally capable of and yet do not suffer from charge separation issues in multi-bit NROM cells.
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Fourson George
Leffert Jay & Polglaze,P.A.
Micro)n Technology, Inc.
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