Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-06
2006-06-06
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000
Reexamination Certificate
active
07056785
ABSTRACT:
A non-volatile memory cell is fabricated using a conventional logic process, with minor modifications. The cell is fabricated by forming a shallow trench isolation (STI) region in a well region of a semiconductor substrate. A recessed region is formed in the STI region, wherein the recessed region extends into the STI region and exposes a sidewall region in the well region. A capacitor region is formed in the sidewall region. A dielectric layer is formed over the well region, including the sidewall region. A gate electrode is then formed over the dielectric layer, wherein a portion of the gate electrode extends into the recessed region. An access transistor of the cell is then formed in a self-aligned manner with respect to the gate electrode. A capacitor structure is formed by the gate electrode (in the recessed region), the dielectric layer on the sidewall region, and the capacitor region.
REFERENCES:
patent: 4811076 (1989-03-01), Tigelaar et al.
patent: 5108941 (1992-04-01), Paterson et al.
patent: 5198995 (1993-03-01), Dennard et al.
patent: 5301150 (1994-04-01), Sullivan et al.
patent: 5365486 (1994-11-01), Schreck
patent: 5394365 (1995-02-01), Tsukikawa
patent: 5414671 (1995-05-01), Fukumoto
patent: 5504706 (1996-04-01), D'Arrigo et al.
patent: 5511020 (1996-04-01), Hu et al.
patent: 5600598 (1997-02-01), Skjaveland et al.
patent: 5694355 (1997-12-01), Skjaveland et al.
patent: 5696036 (1997-12-01), Su et al.
patent: 5699297 (1997-12-01), Yamazaki et al.
patent: 5700708 (1997-12-01), Chen et al.
patent: 5723355 (1998-03-01), Chang et al.
patent: 5736764 (1998-04-01), Chang
patent: 5739566 (1998-04-01), Ota
patent: 5761126 (1998-06-01), Chi et al.
patent: 5783470 (1998-07-01), Rostoker
patent: 5879990 (1999-03-01), Dormans et al.
patent: 5953255 (1999-09-01), Lee
patent: 6060403 (2000-05-01), Yasuda et al.
patent: 6064595 (2000-05-01), Logie et al.
patent: 6102963 (2000-08-01), Agrawal
patent: 6145069 (2000-11-01), Dye
patent: 6147914 (2000-11-01), Leung et al.
patent: 6180453 (2001-01-01), Sung et al.
patent: 6218234 (2001-04-01), Yu et al.
patent: 6221007 (2001-04-01), Green
patent: 6232631 (2001-05-01), Schmidt et al.
patent: 6278159 (2001-08-01), Patelmo et al.
patent: 6282123 (2001-08-01), Mehta
patent: 6329240 (2001-12-01), Hsu et al.
patent: 6686624 (2004-02-01), Hsu
patent: 6777293 (2004-08-01), Koscielniak
Bever Hoffman & Harms LLP
Hoffman E. Eric
Monolithic System Technology, Inc.
Smith Bradley K.
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