Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-10-03
2006-10-03
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S734000
Reexamination Certificate
active
07117414
ABSTRACT:
An identifier is provided for an integrated circuit with a memory composed of a multiplicity of memory cells. The circuit has a manufacture-related memory cell defect pattern formed of defective memory cells. The method of identifying the integrated circuit utilizes the memory cell defect pattern to generate a circuit identification number for identifying the integrated circuit.
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Chaudry Mujtaba K.
Greenberg Laurence A.
Infineon - Technologies AG
Lamarre Guy
Locher Ralph E.
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