Method of forming a PIP capacitor

Details Method of forming a PIP capacitor Method of forming a PIP capacitor

2006-04-18

2006-04-18

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S201000, C438S211000, C438S239000, C438S253000, C438S257000, C438S264000, C438S396000

Reexamination Certificate

active

07029968

ABSTRACT:
A method of forming a polysilicon-insulator-polysilicon (PIP) capacitor in a mixed mode semiconductor device. A floating gate of a split gate transistor and a bottom electrode of a PIP capacitor are formed from a first polysilicon layer using a single lithography mask. Poly-oxide regions are formed over the floating gate and the bottom electrode, and an oxide layer is formed over the poly-oxide regions and other exposed material layers. A nitride layer is deposited over the oxide layer. The nitride layer is patterned to expose at least a portion of the poly-oxide region over the bottom electrode. The exposed oxide layer and poly-oxide region are removed from over the bottom electrode. A second polysilicon layer is deposited over the structure, and a control gate of the split gate transistor and a top electrode of the PIP capacitor are formed from the second polysilicon layer using a single lithography mask.

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EMOSYN, “Technology—Flash”, Emosyn Technology; Flash & Ferroelectrics, http://www.emosyn.com/dspPage.asp?pagid=24.

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