Test apparatus for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S718000

Reexamination Certificate

active

07107504

ABSTRACT:
A test apparatus for a semiconductor device, which improves the reliability of an operational test on target devices on a wafer using BOST (Built Out Self Test) and BIST (Built In Self Test). The test apparatus includes an external test unit, the BIST circuit formed in the semiconductor device, and BOST device which is coupled between the external test unit and the semiconductor device. Pattern data for a pattern dependency test is stored in the BIST circuit and pattern data for a timing dependency test is stored in the BOST device.

REFERENCES:
patent: 5600257 (1997-02-01), Leas et al.
patent: 6097206 (2000-08-01), Takano
patent: 6219289 (2001-04-01), Satoh et al.
patent: 6489791 (2002-12-01), Tsujii
patent: 6587979 (2003-07-01), Kraus et al.
patent: 9-49864 (1997-02-01), None
patent: 10-510682 (1998-10-01), None
patent: 2000-100880 (2000-04-01), None
patent: WO 97/06444 (1997-02-01), None

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