Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-20
2005-12-20
Wojciechowicz, Edward (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C257S257000, C257S369000
Reexamination Certificate
active
06977194
ABSTRACT:
In producing complementary sets of metal-oxide-semiconductor (CMOS) field effect transistors, including nFET and pFET), carrier mobility is enhanced or otherwise regulated through the reacting the material of the gate electrode with a metal to produce a stressed alloy (preferably CoSi2, NiSi, or PdSi) within a transistor gate. In the case of both the nFET and pFET, the inherent stress of the respective alloy results in an opposite stress on the channel of respective transistor. By maintaining opposite stresses in the nFET and pFET alloys or silicides, both types of transistors on a single chip or substrate can achieve an enhanced carrier mobility, thereby improving the performance of CMOS devices and integrated circuits.
REFERENCES:
patent: 2004/0075148 (2004-04-01), Kumagai et al.
Belyansky Michael P.
Chidambarrao Dureseti
Dokumaci Omer H.
Doris Bruce B.
Gluschenkov Oleg
Blecker Ira D.
Whitham Curtis & Christofferson, P.C.
Wojciechowicz Edward
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