Method of trimming a gate electrode structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S267000

Reexamination Certificate

active

06852584

ABSTRACT:
A method and processing tool are provided for trimming a gate electrode structure containing a gate electrode layer with a first dimension. A reaction layer is formed through reaction with the gate electrode structure. The reaction layer is the selectively removed from the unreacted portion of the gate electrode structure by chemical etching, thereby forming a trimmed gate electrode structure with a second dimension that is smaller than the first dimension. The trimming process can be carried out under process conditions where formation of the reaction layer is substantially self-limiting. The trimming process can be repeated to further reduce the dimension of the gate electrode structure.

REFERENCES:
patent: 5910912 (1999-06-01), Hsu et al.
patent: 6794279 (2004-09-01), Stephen et al.

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