Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-01
2005-03-01
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S256000, C438S396000, C438S399000
Reexamination Certificate
active
06861313
ABSTRACT:
A semiconductor memory device includes a silicon substrate with a gate and contact pads at both sides of the gate, an inter-insulation layer formed on the substrate, including a storage node contact and a bit-line contact exposing a corresponding contact pad, and including a groove-shaped bit-line pattern, a storage node contact plug formed in the storage node contact, and a damascene bit line formed within the bit-line pattern and connected with the exposed corresponding contact pad through the bit-line contact.
REFERENCES:
patent: 6436758 (2002-08-01), Jang
patent: 20020173094 (2002-11-01), Park et al.
patent: 20030232471 (2003-12-01), Yokoyama
Marger & Johnson & McCollom, P.C.
Novacek Christy
Samsung Electronics Co,. Ltd.
Zarabian Amir
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