Semiconductor memory device and method for pre-charging the...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S204000

Reexamination Certificate

active

06891767

ABSTRACT:
A semiconductor memory device and a method for pre-charging the same, the semiconductor memory device comprising a plurality of memory cell array blocks, each having a plurality of memory cells connected between respective bit line pairs and respective word line pairs, a plurality of pairs of data input/output lines connected to the respective bit line pairs for transferring data, a first pre-charge circuit for pre-charging the bit line pairs to a first pre-charge voltage during a first operation, a second pre-charge circuit for pre-charging the data input/output line pairs and the first pre-charge voltage to the first pre-charge voltage during the first operation, a plurality of third pre-charge circuits, each being disabled in the first operation and pre-charges the data input/output line pairs in the corresponding memory cell array blocks to a second pre-charge voltage during a second operation, and a discharging circuit for lowering the first pre-charge voltage when the first pre-charge voltage is greater than a desired voltage level during the first operation.

REFERENCES:
patent: 5684745 (1997-11-01), Kim et al.
patent: 5926425 (1999-07-01), Morimoto
patent: 6097652 (2000-08-01), Roh

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