Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-01-04
2005-01-04
Lee, Hsien-Ming (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S595000, C438S639000
Reexamination Certificate
active
06838330
ABSTRACT:
A method of forming a contact hole of a semiconductor device that is able to prevent excessive etching of an interlayer dielectric pattern includes forming a gate pattern including a first insulation layer pattern, a conductive layer pattern, a capping insulation layer pattern, and a second insulation layer pattern on a substrate; forming a spacer using an insulating material on a sidewall of the gate pattern; forming an interlayer dielectric on the substrate on which the gate pattern and the spacer are formed; forming a contact hole and an interlayer dielectric pattern for exposing the substrate by etching the interlayer dielectric; forming a liner spacer on a sidewall of the spacer and the interlayer dielectric pattern; and cleaning the resultant structure using a cleaning solution. The cleaning solution preferably includes includes ozone water and hydrogen fluoride (HF).
REFERENCES:
patent: 6039815 (2000-03-01), Yeol et al.
patent: 6083828 (2000-07-01), Lin et al.
patent: 6322954 (2001-11-01), Li
patent: 2002-15168 (2002-02-01), None
Cheol Ju-Yun
Hwang In-Seak
Ko Yong-Sun
Moon Bong-Ho
Lee Hsien-Ming
Lee & Sterba, P.C.
Samsung Electronics Co,. Ltd.
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