Selective epitaxy to improve silicidation

Details Selective epitaxy to improve silicidation Selective epitaxy to improve silicidation

2005-04-12

2005-04-12

Whitmore, Stacy A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S300000, C438S592000, C438S655000

Reexamination Certificate

active

06878592

ABSTRACT:
A transistor architecture utilizes a raised source and drain region to reduce the adverse affects of germanium on silicide regions. Epitaxial growth can form a silicide region above the source and drain. The protocol can utilize any number of silicidation processes. The protocol allows better silicidation in SMOS devices.

REFERENCES:
patent: 6160299 (2000-12-01), Rodder
patent: 6214679 (2001-04-01), Murthy et al.
patent: 6274445 (2001-08-01), Nouri
patent: 6492216 (2002-12-01), Yeo et al.
patent: 6518155 (2003-02-01), Chau et al.

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