Method of fabricating a non-volatile memory device with a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S279000, C438S294000

Reexamination Certificate

active

06881626

ABSTRACT:
A non-volatile memory device includes a bitline area, a string selection transistor, a plurality of memory transistors, a ground selection transistor, and a source area which are serially disposed. The memory transistors are silicon-oxide-nitride-oxide-silicon (SONOS) transistors having a multi-layered charge storage layer. The memory transistors are also depletion mode transistors having a negative threshold voltage. In a method of fabricating the non-volatile memory device, a first conductive type diffusion layer is formed at a predetermined area of a first conductive type substrate. Impurities of a second conductive type are implanted into a predetermined area of a surface of the substrate where the first conductive type diffusion layer is formed, thereby forming an inversely doped area at a surface of the first conductive type diffusion layer. A string selection gate, a plurality of memory gates, and a ground selection gate are formed over a predetermined area of the first conductive type diffusion layer. Junction areas are formed in the substrate adjacent to both sides of the gates. At least the memory gates are positioned over an area into which the impurities of a second conductive type are implanted, so that the memory transistors may have an inversely doped channel area.

REFERENCES:
patent: 5471423 (1995-11-01), Iwasa
patent: 6107126 (2000-08-01), Wu
patent: 6452232 (2002-09-01), Adan
patent: 6576513 (2003-06-01), Yim et al.
patent: 6777294 (2004-08-01), Park
patent: 20030148583 (2003-08-01), Adachi et al.

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