Single sided adhesive tape for compound diversion on BOC...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond

Reexamination Certificate

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Details

C257S667000, C361S760000, C029S841000

Reexamination Certificate

active

06815835

ABSTRACT:

BACKGROUND OF THE INVENTION
I. Field of the Invention
The present invention relates generally to semiconductor die packaging. More particularly, the present invention relates to an adhesive system and method for encapsulation of a die attached to a circuit board.
II. Description of the Related Art
A board-on-chip (BOC) is a semiconductor integrated circuit (IC) device where the die and the circuit board are attached and encapsulated as one package. The die and board are typically attached, prior to encapsulation, by double sided adhesive tape applied to the bottom of the board and top of the die. The die is also electrically connected to the board by wirebonds. The then attached die and board are completely encapsulated (packaged) for protection with a compound, such as plastic. The compound is injected into a mold and onto the die and board at a high pressure in a hot molten liquid form. The compound then cools and hardens to form a protective package. The encapsulation process is complex because a desired exterior surface of the board, containing the ball grid arrays (BGA), must only be partially sealed with the compound used for encapsulation. In particular, the wirebonds on the exterior surface of the board must be sealed with the encapsulating compound but the compound cannot contact the ball grid arrays. If the compound contacts the balls of a ball grid array the device will be damaged because the connectivity of the board to external circuits will be negatively effected.
FIGS.
1
(
a
)-
1
(
c
) illustrate a conventional BOC package
100
with FIG.
1
(
a
) showing a side view. In a conventional BOC package
100
, the board
102
is physically attached to the die
104
by two pieces of double sided adhesive tape
106
,
108
placed in between the die
104
and board
102
. The die
104
is electrically connected to the board
102
by wirebonds
110
which pass through a wirebond slot
112
in board
102
. The wirebonds
110
are all physically located between the two pieces of adhesive tape
106
,
108
in the wirebond slot
112
.
During encapsulation the compound must fill the wirebond slot
112
and cover all wirebonds
110
on the board
102
, but the compound must not flow beyond the edges of the ball grid arrays
114
,
116
. FIG.
1
(
b
) illustrates a top view of the conventional BOC package
100
and provides a clear depiction of the ball grid arrays
118
,
122
, the edges of the ball grid arrays
114
,
116
, and the wirebond slot
112
.
FIG.
1
(
c
) illustrates a cross sectional view of the BOC package along line A—A of FIG.
1
(
a
) (the area between the die
104
and board
102
). Referring to FIG.
1
(
c
), during encapsulation the compound is introduce into the BOC package under high pressure at the gate
120
. The compound then begins to fill a mold containing the die
104
and encapsulates the BOC package
100
in the direction of arrows
140
-
148
. In this conventional BOC package
100
the wirebond slot
112
may fill before the compound has completely encapsulated the entire die
104
. Thus, the compound may begin to flow up and over the top of the board
102
and past the edges of the ball grid arrays
114
,
116
before the die
104
is encapsulated. As described above, when the compound contacts the ball grid arrays
118
,
122
the BOC package will be damaged.
The foregoing problems of encapsulation of a BOC package are undesirable aspects of conventional semiconductor packaging techniques. A system and method are needed to better encapsulate a BOC package such that the ball grid array will not be damaged during encapsulation.
SUMMARY OF THE INVENTION
The present invention provides an efficient adhesive tape system and method for a BOC package which allows for better encapsulation. The present invention adds a small piece of material, for example, adhesive tape, oriented perpendicular to the conventional two-piece tape system used to attached a die to a circuit board. The material is located in front of the gate of the BOC package during encapsulation to form a diversion dam thereby causing a compound during encapsulation to fill the wirebond slot last. By filling the wirebond slot last, the present invention prevents overflow of the compound, thus ensuring that the ball grid arrays will not be damaged.


REFERENCES:
patent: 5444301 (1995-08-01), Song et al.
patent: 5721450 (1998-02-01), Miles
patent: 5789803 (1998-08-01), Kinsman
patent: 6118183 (2000-09-01), Umehara et al.
patent: 6124629 (2000-09-01), Murakami et al.
patent: 6159764 (2000-12-01), Kinsman et al.
patent: 6218731 (2001-04-01), Huang et al.
patent: 6285558 (2001-09-01), Frantz et al.
patent: 6404068 (2002-06-01), Tanaka et al.
patent: 6570245 (2003-05-01), Ma
patent: 6657132 (2003-12-01), James
patent: 6667560 (2003-12-01), Goh

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