Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-03-09
2004-11-09
Lee, Hsien-Ming (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S108000, C438S118000, C438S455000, C438S612000, C438S613000
Reexamination Certificate
active
06815252
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to flip chip interconnection structures and, more particularly, to an interconnect structure formed by mechanical deformation and interlocking of asperities between the surfaces to be joined.
Flip chip interconnection between an integrated circuit (IC) chip and a substrate is commonly performed in electronic package assembly. In the most common form of such interconnection bumps on the IC chip are metallurgically joined to pads formed on the substrate, usually by melting of the bump material. While this approach provides robust connections, it is difficult to reduce the pitch of the interconnection due to the risk of bridging (i.e. shorting between adjacent connections) during the melting and solidification processes. In an alternative approach the attachment is made using a particulate film or paste, whereby conductive particles in the paste or film together with the shrinkage force of a resin effect an electrical connection. This approach lends itself to reduction of interconnection pitch but suffers from limited long term reliability owing to the susceptibility of the particulate interconnection to degrade over time.
BRIEF SUMMARY OF THE INVENTION
In one general aspect the invention features a method for forming a flip chip interconnection structure, by providing a first member on an IC chip and a second member on a substrate, in which the first member includes a deformable material having a low yield strength and a high elongation to failure and the second member has surface asperities on the part to be bonded with the first member; and pressing the first and second members against one another using a force sufficient to cause plastic flow of part of the first member into asperities on the second member.
In some embodiments the first member is a bump formed on the IC chip, and typically is one of a set of such bumps; and the deformable materials of the first member in some particularly useful embodiments includes gold. In some embodiments the second member is a lead or pad on the substrate, or is a via opening. In some embodiments the second member is a surface pad having a conventional plated surface finish, on which the asperities are provided according to the invention.
In another general aspect the invention features a flip chip interconnection structure made by the method of the invention.
In another general aspect the invention features a flip chip interconnection structure, which includes a first member attached to a chip and a second member attached to a substrate, in which the first member is of a deformable material and the first and second members are bonded by mechanical interlocking of the deformable material of the first member with asperities on the surface of the second member.
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ChipPAC, Inc.
Haynes Beffel & Wolfeld LLP
Kennedy Bill
Lee Hsien-Ming
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