Method of reducing overetch during the formation of a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Reexamination Certificate

active

06759320

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the field of semiconductor manufacture, and more specifically to a method for forming a contact.
BACKGROUND OF THE INVENTION
During the formation of a semiconductor device, contacts, for example to the substrate or word line, are commonly formed.
FIGS. 1-4
describe a method for simultaneously forming a portion of a transistor, contacts to a word line and a substrate.
In
FIG. 1
, a semiconductor wafer substrate
10
having a front and a back is layered with various materials. For example, a gate oxide layer
12
, a polycrystalline silicon (poly) layer
14
, a tungsten silicide layer
16
, and an oxide separation layer
18
are formed on the front of the wafer, then a nitride layer
20
A and
20
B is formed over the entire wafer, including both the front (
20
A) and the back (
20
B), for example by thermally growing the layer. Some of the other materials (for example the gate oxide
12
and poly
14
) may also be formed on the back of the wafer and removed by other processing steps. A patterned photoresist (resist) layer
22
is formed over the nitride layer
18
on the front of the wafer. The,layers are etched using the resist layer
22
as a mask.
Next, a layer of spacer material
24
, for example oxide or nitride, is formed over the front and back of the wafer to result in the structure of
FIG. 2. A
spacer etch can be performed at this point to form the spacers
30
as shown in
FIG. 3
, or the spacer etch can be formed after the back side nitride etch described later. The front of the wafer is protected, for example with a mask (not shown), and the material on the back of the wafer is removed, for example with a wet or, preferably, a dry etch. The material on the back of the wafer is removed to reduce the stress on the wafer caused by the properties of the nitride film. Wafer processing continues, for example to form a first layer of borophosphosilicate glass (BPSG)
32
, a layer of tetraethyl orthosilicate (TEOS)
34
, and a second layer of BPSG
36
as shown in
FIG. 3. A
resist layer
38
is patterned over the wafer, leaving exposed the areas of the wafer to which contacts are to be formed.
An etch is performed in an attempt to result in the structure of FIG.
4
A.
FIG. 4A
shows a structure in which a contact
40
is made to the substrate
10
and a contact
42
is made to the layer of tungsten silicide
16
. The layers
12
-
20
show a stack which forms a portion of a transistor (a word line stack). In a conventional process, stopping the etch at the substrate and at (or within) the layer of tungsten silicide (or some other layer) is difficult using a single etch, for example because the nitride etches slower than the BPSG. Typically, to achieve the tungsten silicide contact
42
a portion of the substrate will be removed as shown in
FIG. 4B
, which can produce an electrically undesirable cell. If the etch is stopped at the substrate, often contact will not be made to the tungsten silicide
16
but the contact will instead stop within the oxide
18
or nitride
20
as shown in FIG.
4
C.
One method of solving this problem is to mask and etch the contact to the substrate, then mask and etch the contact to the tungsten silicide. This, however, adds an extra mask step which can create problems with alignment.
A process which forms a contact to the substrate and to another layer without adding an additional mask step is desirable.
SUMMARY OF THE INVENTION
A method of forming a semiconductor device from a semiconductor wafer having a front and a back comprises the steps of forming a layer of material over the front and back of the wafer, and forming a layer of resist over the front of the wafer and leaving at least a portion of the layer of material over the front of the wafer exposed. The layer of material is removed from the back of the wafer while, simultaneously, at least a portion of the exposed portion of the layer of material over the front of the wafer is removed.
Objects and advantages will become apparent to those skilled in the art from the following detailed description read in conjunction with the appended claims and the drawings attached hereto.


REFERENCES:
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patent: 4758525 (1988-07-01), Kida et al.
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S. Wolf et al., “Silicon Processing for the VLSI Era vol. 1” Lattice Press, 1986, pp. 168-171, 187-193.
Penkunas et al., “Simultaneous Exposure of Photoresist on Both Sides of a Wafer”, Western Electric Technical Digest No. 35, Jul. 1974, pp. 47-48.

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