Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-18
2003-11-18
Eckert, George (Department: 2815)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S613000, C438S717000, C438S736000
Reexamination Certificate
active
06649507
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor fabrication and more specifically to bump processing for semiconductor device fabrication.
BACKGROUND OF THE INVENTION
To electrically communicate between semiconductor device circuitry mounted on a chip carrier and from outside the chip, bonding pads that electrically communicate with the semiconductor device circuitry are exposed through a passivation layer over a wafer. “Bumps” may then be formed over the bonding pads with wires, for example, attached to the bumps that permit electrical communication between the semiconductor device circuitry and outside the chip.
Mushroom structure plating is used to obtain the desired final bump height without any change from a design point, i.e. without forming wider openings exposing the under bump metal (UBM) upon which the bump is deposited.
U.S. Pat. No. 5,665,639 to Seppala et al. describes a process for manufacturing a bump electrode using a rapid thermal anneal (RTA) that minimizes the intermixing of materials between a bump and a bonding pad.
U.S. Pat. No. 6,051,450 to Ohsawa et al. describes a method of manufacturing a lead frame whereby metal films to constitute bumps are formed on a metal base by electrolytic plating and then a circuit wiring including inner leads is formed by electrolytic plating with a metal so that the inner leads are connected to the respective metal films.
U.S. Pat. No. 5,904,156 to Advocate, Jr. et al. describes a process for wet chemically stripping dry, thick film photoresists in semiconductor applications.
U.S. Pat. No. 5,882,957 to Lin describes a ball grid array (BGA) packaging method for an integrated circuit (IC).
U.S. Pat. No. 5,633,535 to Chao et al. describes an apparatus having standoff spacing pedestals supporting a device above a substrate during solder reflow and bonding.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improved method of forming mushroom bumping plating structures.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure having an exposed first conductive structure is provided. A first photoresist layer is formed over the structure and the exposed first conductive structure. A second capping photoresist layer is formed over the first photoresist layer. The first and second photoresist layers being comprised of different photoresist materials. The first and second photoresist layers are patterned to form an opening through the first and second photoresist layers and over the first conductive structure. The second capping photoresist layer prevents excessive formation of first photoresist layer residue during processing. A second conductive structure is formed within the opening. The first and second patterned photoresist layers are stripped. The second conductive structure is reflowed to form the bump structure.
REFERENCES:
patent: 5496770 (1996-03-01), Park
patent: 5633535 (1997-05-01), Chao et al.
patent: 5665639 (1997-09-01), Seppala et al.
patent: 5882957 (1999-03-01), Lin
patent: 5904156 (1999-05-01), Advocate, Jr. et al.
patent: 6051450 (2000-04-01), Ohsawa et al.
patent: 6218281 (2001-04-01), Watanabe et al.
patent: 2001/0028105 (2001-10-01), Hashimoto et al.
patent: 63318145 (1988-12-01), None
patent: 02087526 (1990-03-01), None
patent: 03019344 (1991-01-01), None
Chen Yen-Ming
Chu Cheng-Yu
Fan Fu-Jier
Fan Yang-Tung
Lin Kuo-Wei
Ackerman Stephen B.
Eckert George
Richards N. Drew
Saile George O.
Stanton Stephen G.
LandOfFree
Dual layer photoresist method for fabricating a mushroom... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dual layer photoresist method for fabricating a mushroom..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual layer photoresist method for fabricating a mushroom... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3147106