Silicon layer to improve plug filling by CVD

Details Silicon layer to improve plug filling by CVD Silicon layer to improve plug filling by CVD

2001-10-16

2003-08-05

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

C438S584000, C438S629000, C438S637000, C438S672000, C438S675000, C438S680000, C438S681000

Reexamination Certificate

active

06602770

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to chemical vapor deposition (CVD) processes for forming an electrically conductive plug in an electronic substrate such as an integrated circuit. More specifically, the invention relates to such a process in which a layer of silicon is deposited before filling the plug in order to increase the homogeneity of the electrically conductive material during the filling of the plug.
BACKGROUND OF THE INVENTION
A common process sequence in manufacturing integrated circuits and other electronic devices is to deposit a dielectric layer over a semiconductor or metal region on a substrate, then etch a number of openings in the dielectric so that each opening exposes a contact area on the semiconductor or metal region, then fill each opening with an electrically conductive material so as to form a plug that makes electrical contact with the contact area.
It is very difficult to fill an opening having a very narrow width or a high aspect ratio, that is, a high ratio of height to width. In such an opening, the metal or other electrically conductive material deposited to fill the opening can agglomerate while the opening is being filled, thereby preventing the metal from flowing into and filling the portion of the opening below the agglomeration. The resulting void renders the plug defective.
Conventional processes for forming a plug typically attempt to prevent the formation of voids by depositing a wetting layer or adhesion layer, typically composed of titanium nitride, on the side wall of an opening before depositing the metal used to fill the plug. However, we have found that a titanium nitride wetting layer can be inadequate to prevent the formation of voids in openings having a high aspect ratio, for example, an aspect ratio of 6 or more. This is especially true of titanium nitride layers formed by CVD using a metallo-organic precursor gas, which is a preferred method of depositing titanium nitride when the substrate temperature must remain low.
Even if a narrow opening is completely filled without voids, the plug may have undesirably high resistivity because the crystallographic structure of the conductive material of the plug may include a large number of small grains rather than a small number of large grains. A large number of grain boundaries within the plug increases its electrical resistance.
SUMMARY OF THE INVENTION
The invention is a method of forming an electrically conductive plug in which a first layer of material is deposited on the walls of an opening before the opening is filled with electrically conductive material. The first layer is deposited by thermal decomposition of silane (SiH4). We have discovered that the silane decomposition step improves the homogeneity of the electrically conductive material subsequently deposited to fill the plug. The resulting plug material typically has larger grains, and higher aspect ratio openings typically can be filled without voids.


REFERENCES:
patent: 5371042 (1994-12-01), Ong
patent: 5378660 (1995-01-01), Ngan et al.
patent: 5443995 (1995-08-01), Nulman
patent: 5525543 (1996-06-01), Chen
patent: 5527739 (1996-06-01), Parrillo et al.
patent: 5681613 (1997-10-01), Hansen
patent: 5741740 (1998-04-01), Jang et al.
patent: 5804249 (1998-09-01), Sukharev et al.
patent: 6001734 (1999-12-01), Drynan
patent: 6040207 (2000-03-01), Gardner et al.
patent: 6080659 (2000-06-01), Chen et al.
patent: 6174795 (2001-01-01), Shih et al.
patent: 6194287 (2001-02-01), Jang
patent: 6214731 (2001-04-01), Nogami et al.
patent: 6303480 (2001-10-01), Desai et al.
patent: 6350687 (2002-02-01), Avanzino et al.
patent: 6410986 (2002-06-01), Merchant et al.

Affiliated with

Also associated with

Rating

Silicon layer to improve plug filling by CVD does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Silicon layer to improve plug filling by CVD, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Silicon layer to improve plug filling by CVD will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3091900