Methods for manufacturing storage nodes of stacked capacitors

Details Methods for manufacturing storage nodes of stacked capacitors Methods for manufacturing storage nodes of stacked capacitors

2002-08-07

2003-09-02

Chen, Jack (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S003000, C438S240000, C438S396000

Reexamination Certificate

active

06613629

ABSTRACT:

RELATED APPLICATION
This application claims priority from Korean Application No. 2001-47730, filed Aug. 8, 2001, the disclosure of which is hereby incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to integrated circuit devices and more particularly methods for manufacturing integrated circuit devices including a storage node of a capacitor.
Various integrated circuit devices, including semiconductor memory devices, include one or more capacitors fabricated (manufactured) on the integrated circuit substrate. There is a growing need to increase the capacitance within a limited area as integrated circuit (semiconductor) devices become more highly integrated. Various approaches have been proposed to provide a desired capacitance in a more limited space, for example, to provide increased density of memory cells in an integrated circuit memory device. One proposed approach is a thinning method for reducing the thickness of a dielectric layer. A second approach includes increasing the surface area of an electrode by using a three-dimensional electrode, such as cylinder-type electrode or a fin-type electrode. Another approach is to grow hemispherical grains (HSG) on the surface of an electrode. A further alternative approach is to use a dielectric layer of a high dielectric material having a dielectric constant which is significantly greater than that of a conventional oxide
itride/oxide (ONO) dielectric.
When a metal-insulator-metal (MIM) capacitor is formed using a dielectric layer made with a high dielectric material, the capacitor is typically fabricated using an electrode formed of a metal of the platinum (Pt) group rather than a conventional polysilicon electrode. For a polysilicon electrode, a low dielectric layer such as a Silicon Oxide (SiO
N
) layer, capable of suppressing a reaction between the polysilicon electrode and a dielectric layer may be beneficial in obtaining stable leakage current characteristics. As a result, the potential increase in capacitance value using the thinning method may be limited.
In a MIM capacitor a leakage current may be controlled by providing a leakage current barrier layer. Such a layer may result, for example, from a difference in the work function between a metal electrode and a dielectric layer at their interface. Accordingly, stable leakage current characteristics may generally be obtained without the low dielectric layer. Therefore, a greater increase in capacitance may be achieved by thinning the dielectric layer in a MIM capacitor.
Storage nodes of a MIM capacitor can generally be classified into three types: a concave storage node, a cylindrical storage node and a stacked storage node. Of these types of storage nodes, the concave storage node is typically the easiest to manufacture and planarize. However, in a typical concave storage node, only the inner wall of a storage node serves as a charging area. Therefore, it may be difficult to obtain a large capacitance, as the design rule applied to such devices may be very small.
The cylindrical storage node may be advantageous in that both the outer and inner walls of the storage node may serve as a charging area. Thus, the height of the electrode of the cylindrical storage node may be lower than with the other types of storage nodes identified above. However, a cylindrical storage node may be difficult to configure stably and the size of the inner wall of its electrode typically is generally reduced as the design rules applied to such device get smaller. This may, eventually, result in the storage node being more properly categorized as a stacked storage node.
The stacked storage node generally has the most stable structure of the types of storage nodes discussed above and can generally be implemented with a finer (smaller) design rule than the other types of storage nodes. However, a stacked storage node may be difficult to manufacture, for example, because it may be hard to etch a platinum group metal used as an electrode of the stacked storage node.
It is known to form a dielectric layer having a contact plug therein on a semiconductor wafer in which a conductive region is formed during the manufacture of a stacked storage node. An etch stopper material layer and a sacrificial insulating material layer may subsequently be sequentially formed on the dielectric layer. Predetermined portions of the sacrificial insulating material layer and the etch stopper material layer may then be etched, thereby providing a structure including an etch stopper, a sacrificial dielectric layer, and a storage node hole exposing the contact plug.
After formation of the storage node hole, a relatively thick metal layer of a platinum group material is typically deposited on the integrated circuit substrate (semiconductor wafer), thereby filling the storage node hole, preferably completely. However, a void or seam may form in the metal layer in the storage node hole. As an increase of the capacitance of the stacked capacitor is typically provided by increasing the depth of the storage node hole relative to its diameter, its aspect ratio increase, which may increase the difficulty of filling the storage node hole with the metal layer without forming a void or seam.
In a conventional manufacturing process, the metal layer deposited on the sacrificial dielectric layer is removed by etch back or chemical-mechanical polishing (CMP) after deposition to form a storage node in the storage node hole as the metal is not removed from the storage node hole by the removal process. The sacrificial dielectric layer is then removed and a dielectric layer and an upper electrode are sequentially formed on the integrated circuit device including the stacked storage node.
As a void or seam may form in the storage node of the conventional stacked capacitor storage node, the inner portion of the storage node typically may not be formed only of conductive materials. As a result, the storage node may be structurally weak and subject to being bent or being deformed during a subsequent high-temperature heating process. In addition, the electrical characteristics of the storage node may deteriorate due to an increase in resistance.
A conventional process for forming a storage node will now be described with reference to FIGS.
1
and
2
A-
2
E.
FIG. 1
is a scanning electron microscope (SEM) photograph of a storage node manufactured by a conventional method, taken at an oblique angle. As shown in the photograph, a seam
110
is present in the storage node
100
. To reduce the risk/severity of such seams in a typical conventional process, a reflow process was used in which the storage node is heated to a high temperature.
FIGS. 2A through 2E
are cross-sectional diagrams illustrating conventional manufacturing operations for forming a stacked capacitor to reduce or eliminate the occurrence of voids or seams. As illustrated in
FIG. 2A
, a contact plug
330
is formed on a portion of an integrated circuit substrate
300
. A conductive region
310
is positioned in the integrated circuit substrate
300
, which is contacted by the contact plug
330
. A first dielectric layer
320
is formed on the remaining illustrated portions of the integrated circuit substrate
300
adjacent the contact plug
330
to define the contact plug
330
therein. An etch stopper material layer and a sacrificial insulating material layer are sequentially formed on the dielectric layer
320
and regions of these layers are etched to form, respectively, a second, sacrificial dielectric layer
350
and an etch stopper
340
, which define a storage node hole
360
adjacent to and exposing the contact plug
330
.
As shown in
FIG. 2B
, a metal layer
370
, which may be formed of a metal selected from the platinum group, is deposited into the storage node hole
360
and on the sacrificial dielectric layer
350
. The metal layer
370
may be deposited as a thick layer, for example, to a thickness of about 1000 angstroms (Å) or more. However, as illustrated by the void (or seam)
380
in
FIG. 2B
, the storage node hole

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