Etching a substrate: processes – Gas phase etching of substrate – Etching inorganic substrate
Reexamination Certificate
2001-12-13
2003-04-15
Goudreau, George (Department: 1763)
Etching a substrate: processes
Gas phase etching of substrate
Etching inorganic substrate
C216S055000, C219S121340, C219S121590, C438S714000, C204S192320, C315S111210, C134S001200
Reexamination Certificate
active
06547978
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a particular chemistry which provides advantages in the pattern etching a copper layer on the surface of a semiconductor device substrate. In particular, the etched portion of a feature surface is protected from reactive species during the etching of adjacent feature surfaces.
2. Brief Description of the Background Art
In the multi level metallization architecture used in present day semiconductor devices, aluminum is generally used as the material of construction for interconnect lines and contacts. Although aluminum offers a number of advantages in ease of fabrication, as integrated circuit designers focus on transistor gate velocity and interconnect line transmission time, it becomes apparent that copper is the material of choice for the next generation of interconnect lines and contacts. In particular, when the aluminum wire size becomes smaller than 0.5 &mgr;m, the electromigration resistance and the stress migration resistance of aluminum becomes a problem area. In addition, when the feature size of an aluminum-based contact requires an aspect ratio of greater than 1:1, it is difficult to obtain planarization of the substrate during the application of the next insulating layer over the contact area of the substrate. Further, the resistivity of copper is about 1.4 &mgr;&OHgr;cm, which is only about half of the resistivity of aluminum.
There are two principal competing technologies under evaluation by material and process developers working to enable the use of copper. The first technology is known as damascene technology. In this technology, a typical process for producing a multilevel structure having feature sizes in the range of 0.5 micron (&mgr;m) or less would include: blanket deposition of a dielectric material; patterning of the dielectric material to form openings; deposition of a diffusion barrier layer and, optionally, a wetting layer to line the openings; deposition of a copper layer onto the substrate in sufficient thickness to fill the openings; and removal of excessive conductive material from the substrate surface using chemical-mechanical polishing (CMP) techniques. The damascene process is described in detail by C. Steinbruchel in “Patterning of copper for multilevel metallization: reactive ion etching and chemical-mechanical polishing”,
Applied Surface Science
91 (1995) 139-146.
The competing technology is one which involves the patterned etch of a copper layer. In this technology, a typical process would include deposition of a copper layer on a desired substrate (typically a dielectric material having a barrier layer on its surface); application of a patterned hard mask or photoresist over the copper layer; pattern etching of the copper layer using wet or dry etch techniques; and deposition of a dielectric material over the surface of the patterned copper layer, to provide isolation of conductive lines and contacts which comprise various integrated circuits. An advantage of the patterned etch process is that the copper layer can be applied using sputtering techniques well known in the art. The sputtering of copper provides a much higher deposition rate than the evaporation or CVD processes typically used in the damascene process, and provides a much cleaner, higher quality copper film than CVD. Further, it is easier to etch fine patterns into the copper surface and then deposit an insulating layer over these patterns than it is to get the barrier layer materials and the copper to flow into small feature openings in the top of a patterned insulating film.
Each of the above-described competing technologies has particular process problems which must be solved to arrive at a commercially feasible process for device fabrication. In the case of the damascene process, due to difficulties in the filling of device feature sizes of 0.25 &mgr;m and smaller (and particularly those having an aspect ratio greater than one) on the surface of the dielectric layer, the method of choice for copper deposition is evaporation (which is particularly slow and expensive); or chemical vapor deposition, or CVD (which produces a copper layer containing undesirable contaminants and is also a relatively slow deposition process). Just recently, electroplating has been investigated as a method for copper deposition.
Regardless of the technique used to deposit copper, the CMP techniques used to remove excess copper from the dielectric surface after deposition create problems. Copper is a soft material which tends to smear across the underlying surface during polishing. “Dishing” of the copper surface may occur during polishing. As a result of dishing, there is variation in the critical dimensions of conductive features. Particles from the slurry used during the chemical mechanical polishing process may become embedded in the surface of the copper and other materials surrounding the location of the copper lines and contacts. The chemicals present in the slurry may corrode the copper, leading to increased resistivity and possibly even corrosion through an entire wire line thickness. Despite the number of problems to be solved in the damascene process, this process is presently viewed in the industry as more likely to succeed than a patterned copper etch process for the following reasons.
The patterned etch process particularly exposes the copper to corrosion. Although it is possible to provide a protective layer over the etched copper which will protect the copper form oxidation and other forms of corrosion after pattern formation, it is critical to protect the copper during the etch process itself to prevent the accumulation of involatile corrosive compounds on the surface of the etched copper features. These involatile corrosive compounds cause continuing corrosion of the copper even after the application of a protective layer over the etched features.
Wet etch processes have been attempted; however, there is difficulty in controlling the etch profile of the features; in particular, when the thickness of the film being etched is comparable to the minimum pattern dimension, undercutting due to isotropic etching becomes intolerable. In addition, there is extreme corrosion of the copper during the etch process itself.
Plasma etch techniques provide an alternative. A useful plasma etch process should have the following characteristics: It should be highly selective against etching the mask layer material; it should be highly selective against etching the material under the film being etched; it should provide the desired feature profile (e.g. the sidewalls of the etched feature should have the desired specific angle); and the etch rate should be rapid, to maximize the throughput rate through the equipment.
Until very recently etch rates obtained by purely physical bombardment were typically about 300 Å-500 Å per minute or less, as described by Schwartz and Schaible,
J. Electrochem. Soc., Vol.
130, No. 8, p. 1777 (1983) and by H. Miyazaki et al.,
J. Vac. Sci. Technol.
B 15(2) p.239 (1997), respectively. Recently, applicants have been able to improve on the etch rates achievable by purely physical bombardment so that etch rates as high as 5,000 Å per minute can be achieved. Further, the selectivity between copper and materials commonly used as barrier layers, insulating layers and patterning masks is more than satisfactory. This technology is disclosed in detail in pending U.S. Pat. No. 6,010,603, filed Jul. 9, 1997. However, etch rate and selectivity must be accompanied by the ability to etch a pattern having the desired cross-sectional profile. To improve etch profile, it is necessary to use a limited amount of chemical reactants during the etch process.
The chemical reactants must be very carefully selected to react with the copper and create volatile species which can then be removed by application of vacuum to the process chamber. However, when such chemical reactants are used, corrosion is a major problem during the fabrication, as copper does not form any self passivating
Deng Xiancan
Hsieh Chang-Lin
Ma Diana Xiaobing
Ye Yan
Zhao Allen
Applied Materials Inc.
Bach Joseph
Church Shirley L.
Goudreau George
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