Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-07-31
2002-09-24
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S648000, C438S681000, C438S785000, C438S793000, C438S798000
Reexamination Certificate
active
06455421
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to a method of tantalum nitride film deposition and, more particularly, to a method of forming a tantalum nitride compound film having good step-coverage and low resistivity.
2. Description of the Background Art
In the manufacture of integrated circuits, tantalum nitride (TaN) films are often used as barrier layers to inhibit the diffusion of metals into regions underlying the barrier layer. These underlying regions include transistor gates, capacitor dielectric, semiconductor substrates, metal lines, and many other structures that appear in integrated circuits. Tantalum nitride (TaN), for example, is often used as a diffusion barrier for copper (Cu) metallization.
TaN layers are typically formed using physical vapor deposition (PVD) and/or chemical vapor deposition (CVD) techniques. For example, tantalum may be sputtered from a tantalum target in the presence of a nitrogen source to form TaN films using PVD. However, as the dimensions of integrated circuit features are reduced (e. g., integrated circuit dimensions less than about 0.2 &mgr;m (micrometers)) the step coverage of PVD deposited TaN films may become poor. The step coverage of a film is a measure of how well such film maintains its nominal thickness as it crosses steps that occur on the surface of a substrate. Step coverage is expressed as the ratio of the minimum thickness of a film as it crosses a step to the nominal thickness of the film on flat regions.
CVD TaN films may be formed by thermally decomposing a tantalum containing metal-organic precursor or by reacting such tantalum containing metal-organic precursor with a nitrogen source. For example, TaN is formed when pentakis(dimethylamido) tantalum (abbreviated PDEAT) (Ta(N(CH
3
)
2
)
5
) decomposes or when pentakis(dimethylamido) tantalum (Ta(N(CH
3
)
2
)
5
) reacts with ammonia (NH
3
).
TaN films formed by reacting pentakis(dimethylamido) tantalum (Ta(N(CH
3
)
2
)
5
) with ammonia typically have a low resistivity (e.g., resistivity of about 1,000 &mgr;ohm-cm), but poor step coverage. Conversely, TaN films formed from the decomposition of pentakis(dimethylamido) tantalum (Ta(N(CH
3
)
2
)
5
) typically have good step coverage, but high resistivity (e.g., resistivity of about 100,000 &mgr;ohm-cm).
Therefore, a need exists in the art for a method of forming TaN films having good step coverage and low resistivity.
SUMMARY OF THE INVENTION
A method of forming tantalum nitride (TaN) compound layers for use in integrated circuit fabrication processes is provided. The tantalum nitride (TaN) compound layer is formed by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed, it is plasma treated. The tantalum nitride (TaN) compound layer is preferably plasma treated with an argon (Ar) based plasma.
The tantalum nitride (TaN) compound layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the tantalum nitride (TaN) compound layer is used as a barrier layer for fabricating integrated circuit structures such as, for example, vias. For such an integrated circuit fabrication process, a preferred process sequence includes providing a substrate having a dielectric material thereon. The dielectric material has vias therein. A tantalum nitride (TaN) compound layer is formed on the dielectric material by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed on the dielectric material, it is plasma treated, preferably with an argon (Ar) based plasma. Thereafter, the integrated circuit structure is completed by filling the vias with a conductive material.
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Itoh Toshio
Marcadal Christophe
Yang Michael X.
Applied Materials Inc.
Elms Richard
Moser Patterson & Sheridan LLP
Pyonin Adam
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