Method for fabricating integrated circuit features

Details Method for fabricating integrated circuit features Method for fabricating integrated circuit features

2008-03-18

2008-03-18

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07346887

ABSTRACT:
The present invention is directed to a method for conversion of an integrated circuit design into a set of masks for fabrication of an integrated circuit that optimizes use of an edge based image transfer mask process.

REFERENCES:
patent: 4919768 (1990-04-01), Bladon
patent: 5342501 (1994-08-01), Okabayashi
patent: 6083275 (2000-07-01), Heng et al.
patent: 6506293 (2002-01-01), Rumpf
patent: 6440839 (2002-08-01), Partovi et al.
patent: 6653231 (2003-11-01), Okoroanyanwu et al.
patent: 6660154 (2003-12-01), Merricks et al.
patent: 6713396 (2004-03-01), Anthony
patent: 6795961 (2004-09-01), Liebmann et al.
patent: 6901576 (2005-05-01), Liebmann et al.
patent: 7100134 (2006-08-01), Wu et al.
patent: 7249342 (2007-07-01), Pack et al.
patent: 2001/0040267 (2001-11-01), Lien et al.
patent: 2003/0203636 (2003-10-01), Anthony
patent: 2004/0038513 (2004-02-01), Kohl et al.

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