Method of forming a semiconductor device having an etch stop...

Details Method of forming a semiconductor device having an etch stop... Method of forming a semiconductor device having an etch stop...

2011-08-02

2011-08-02

Zarneke, David A (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27084

Reexamination Certificate

active

07989863

ABSTRACT:
In one embodiment, a lower interlayer dielectric layer, and first and second landing pads penetrating the lower interlayer dielectric layer are formed on a substrate. Interconnection patterns covering the second landing pads are formed on the lower interlayer dielectric layer. An etch stop layer is formed over the interconnection patterns. An upper interlayer dielectric layer filling a gap region between the interconnection patterns is formed on the etch stop layer. The upper interlayer dielectric layer is patterned to form a preliminary contact hole between the interconnection patterns, where the etch stop layer is exposed at the bottom of the preliminary contact hole. The preliminary contact hole is extended and the etch stop layer exposed by the extended preliminary contact hole is removed to form a first contact hole exposing the first landing pad. A buried contact plug is then formed within the first contact hole.

REFERENCES:
patent: 6211091 (2001-04-01), Lien et al.
patent: 6649508 (2003-11-01), Park et al.
patent: 2005/0037590 (2005-02-01), Inoue et al.
patent: 2003-249572 (2003-09-01), None
patent: 2001-0077518 (2001-08-01), None
patent: 10-2005-0002985 (2005-01-01), None

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