Semiconductor memory device implementing full-VDD bit line...

Details Semiconductor memory device implementing full-VDD bit line... Semiconductor memory device implementing full-VDD bit line...

2011-08-30

2011-08-30

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S205000

Reexamination Certificate

active

08009494

ABSTRACT:
A semiconductor memory device using a full-VDD bit line precharge scheme by using a bit line sense amplifier includes a precharge unit precharging a bit line and a complementary bit line from a power voltage to a voltage that is less than the power voltage by a predetermined voltage, and the bit line sense amplifier including first and second transistors serially connected between the bit line and the complementary bit line to be cross-coupled to each other, wherein a gate of the first transistor is connected to the complementary bit line and a gate of the second transistor is connected to the bit line. The precharge unit precharges, in response to a first precharge signal, the bit line and the complementary bit line to a voltage that is less than the power voltage by a threshold voltage of the first or second transistor, and precharges, in response to a second precharge signal, the bit line and the complementary bit line from the power voltage to a voltage that is less than the power voltage by half of a threshold voltage of the first or second transistor.

REFERENCES:
patent: 6097649 (2000-08-01), Chiang et al.
patent: 1999-0050491 (1999-07-01), None
patent: 2000-0021078 (2000-04-01), None
patent: 10-2007-0018221 (2007-02-01), None

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