Nonvolatile semiconductor device including a floating gate,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21626, C257SE21640

Reexamination Certificate

active

07902024

ABSTRACT:
A memory device includes a first floating gate electrode on a substrate between adjacent isolation layers in the substrate, at least a portion of the first floating gate protruding above a portion of the adjacent isolation layers, a second floating gate electrode, electrically connected to the first floating gate electrode, on at least one of the adjacent isolation layers, a dielectric layer over the first and second floating gate electrodes, and a control gate over the dielectric layer and the first and second floating gate electrodes.

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patent: 6235589 (2001-05-01), Meguro
patent: 6756631 (2004-06-01), Wu
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patent: 6933194 (2005-08-01), Narita et al.
patent: 7148100 (2006-12-01), Kim et al.
patent: 10-012750 (1998-01-01), None
patent: 10-2002-0091984 (2002-12-01), None
patent: 10-2003-0056666 (2003-07-01), None

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