Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-01-04
2011-01-04
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S483000, C438S590000, C438S508000, C438S508000
Reexamination Certificate
active
07863142
ABSTRACT:
Example embodiments relate to a method of forming a germanium (Ge) silicide layer, a semiconductor device including the Ge silicide layer, and a method of manufacturing the semiconductor device. A method of forming a Ge silicide layer according to example embodiments may include forming a metal layer including vanadium (V) on a silicon germanium (SiGe) layer. The metal layer may have a multiple-layer structure and may further include at least one of platinum (Pt) and nickel (Ni). The metal layer may be annealed to form the germanium silicide layer. The annealing may be performed using a laser spike annealing (LSA) method.
REFERENCES:
patent: 6797614 (2004-09-01), Paton et al.
patent: 7432559 (2008-10-01), Lai et al.
patent: 7449782 (2008-11-01), Cabral et al.
patent: 2008/0132019 (2008-06-01), Ku et al.
patent: 2009/0108378 (2009-04-01), Zhu et al.
Chen Weiwei
Jeon Joong S.
Lee Nae-in
Moon Chang-wook
Rhee Hwa-sung
Harness Dickey & Pierce PLC
Le Dung A.
Samsung Electronics Co,. Ltd.
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