Method and apparatus for multi-bit register cell

Details Method and apparatus for multi-bit register cell Method and apparatus for multi-bit register cell

1999-04-14

2000-09-05

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Multiplexing

36523002, 365194, G11C 700

Patent

active

061152943

ABSTRACT:
The present invention is a method and apparatus for a register cell that is configured to store more than one bit of information. The cell includes a multiplexer that is configurable to select various inputs when the multiplexer is in various states. The multiplexer is configurable to select a first input when the multiplexer is in a first state, and to select a second input when the multiplexer is in a second state. The multiplexer is further configured to provide multi-bit storage data, the first input being configured to receive multi-bit data from outside the cell. An output element, such as a second multiplexer, is configured to receive a word enable. The output of the first multiplexer is delayed in a delay element, and is provided as one of the inputs to the first multiplexer.

REFERENCES:
patent: 5497355 (1996-03-01), Mills et al.
patent: 5684744 (1997-11-01), Orgill et al.
patent: 5787041 (1998-07-01), Hill et al.
patent: 5870350 (1999-02-01), Berton et al.
patent: 5956274 (1999-09-01), Elliott et al.
patent: 5963504 (1999-10-01), Manning

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