4. Static information storage and retrieval
  5. Read/write circuit
  6. Differential sensing

Michael R. Seningen

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Dynamic logic scan gate method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Dynamic logic scan gate method and apparatus

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate

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Method and apparatus for 1 of 4 register file design

Static information storage and retrieval – Read/write circuit – Multiplexing
Patent

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Method and apparatus for a 1 of N signal

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate

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Method and apparatus for a logic circuit with constant power con

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent

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Profile ID: LFUS-PAI-P-218242

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