Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-06-11
1999-03-23
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438255, H01L 218242
Patent
active
058858660
ABSTRACT:
A method of fabricating the self-registered cylindrical capacitor of high density Dynamic Random Access Memory (DRAM) cells. A first polysilicon layer which is the storage node of the capacitor is deposited overlaying the entire silicon substrate surface. A dielectric layer is formed overlaying the first polysilicon layer. Then, the dielectric layer and the first polysilicon layer are polished by CMP to form the cylindrical shape capacitor storage nodes. The self-registered cylindrical polysilicon storage nodes are formed by CMP technique without using the extra mask as the conventional method would. The first polysilicon storage nodes are treated by hot phosphoric acid (H.sub.3 PO.sub.4) to form the rugged surface that can tremendously increase the surface area of the capacitor. Therefore, the cylindrical capacitor storage node of the DRAM capacitor of this method has much greater surface area so as to increase the capacitance value of the DRAM capacitor, that can achieve high packing density of the integrated circuit devices.
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patent: 5266514 (1993-11-01), Tuan et al.
patent: 5445986 (1995-08-01), Hirota
patent: 5607874 (1997-03-01), Wang et al.
patent: 5686337 (1997-11-01), Koh et al.
Mosel Vitelic Inc.
Tsai Jey
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