Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
Patent
1998-08-21
2000-10-03
Follansbee, John A.
Electrical computers and digital processing systems: processing
Processing control
Specialized instruction processing in support of testing,...
712226, 714 35, 714730, G06F 1100
Patent
active
06128727&
ABSTRACT:
A method and system for testing a plurality of addressing modes in a microprocessor comprising executing a test instruction which is stored in memory, subsequently overwriting the test instruction in memory and then re-executing the test instruction. The test instruction is stored at a memory location which is within a code segment. A data segment is defined to overlap with the code segment and a portion of the test instruction is overwritten by storing data within the overlapping data segment. The overwritten portion of the test instruction identifies the addressing mode of the test instruction and the stored data represents the next addressing mode to be tested. In an x86 architecture, the overwritten portion of the test instruction may comprise a MODR/M byte and an SIB byte, each of which may take on values from 00 to ff (hexadecimal). The addressing modes of the microprocessor may therefore be tested by sequentially incrementing the MODR/M and SIB bytes and executing the test instruction.
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Gray Christopher
Wisor Michael
Advanced Micro Devices , Inc.
Benson Walter
Follansbee John A.
Kivlin B. Noel
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