Trench-free buried contact for locos isolation

Details Trench-free buried contact for locos isolation Trench-free buried contact for locos isolation

1998-12-28

2000-10-24

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438439, 438655, H01L 21336, H01L 218234, H01L 2176, H01L 2144

Patent

active

061366331

ABSTRACT:
A new method of forming an improved buried contact junction is described. A gate oxide layer is provided over the surface of a semiconductor substrate. A first polysilicon layer is deposited over the gate oxide layer. A photoresist mask is formed over the first polysilicon layer having an opening over the planned buried contact. The first polysilicon layer not covered by the photoresist mask is etched away. A portion of the photoresist mask at the edges of the opening is cut away to expose a portion of the first polysilicon layer at the edges of the opening. The gate oxide layer not covered by the mask is etched away using a reduced etching selectivity of oxide to silicon so that an upper portion of the first polysilicon layer exposed at the edges of the opening is etched away leaving a thinner first polysilicon layer at the edges of the opening. Ions are implanted through the opening and through the thinner first polysilicon layer into the semiconductor substrate to form the buried contact. The photoresist mask is removed and a second polysilicon layer is deposited overlying the first polysilicon layer and the buried contact to complete formation of the buried contact.

REFERENCES:
patent: 5292676 (1994-03-01), Manning
patent: 5494848 (1996-02-01), Chin
patent: 5576242 (1996-11-01), Liu
patent: 5654231 (1997-08-01), Liang et al.
patent: 5674770 (1997-10-01), Lee et al.
patent: 6066549 (2000-05-01), Manning

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