Read bus controlling apparatus for semiconductor storage device

Static information storage and retrieval – Read/write circuit – Precharge

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365207, G11C 700

Patent

active

059010975

ABSTRACT:
The invention provides a semiconductor storage device which is comparatively short in read time. A read route is formed from a first read bus pair connected to a plurality of sense amplifiers, to which a bit line pair is inputted, and inputted to a first data amplifier, a second read bus pair connected to the first data amplifier connected to the sense amplifiers, to which the bit line pair is inputted, and also to a precharge circuit and inputted to a second data amplifier, a third read bus outputted from the second data amplifier and inputted to a data output buffer, and a bus extending from the data output buffer to an output terminal. The precharge circuit is connected to the second read buses in the proximity of the first data amplifier connected to the second read buses at a position remote from the connection points between the second data amplifier and the second read buses.

REFERENCES:
patent: 5023841 (1991-06-01), Akrout et al.
patent: 5500820 (1996-06-01), Makaoka
patent: 5640355 (1997-06-01), Muraoka et al.

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