Method for forming a via contact of a semiconductor device

Details Method for forming a via contact of a semiconductor device Method for forming a via contact of a semiconductor device

1995-08-29

1998-02-24

Quach, T. N.

Fishing, trapping, and vermin destroying

437192, 437193, 437228, H01L 21283, H01L 2131

Patent

active

057211558

ABSTRACT:
A method for forming a via contact of a semiconductor device includes the steps of forming a first insulating layer on a substrate, forming a lower conducting layer on the first insulating layer, forming a third insulating layer on the lower conducting layer, forming a first photoresist on the third insulating layer, etching the third insulating layer to form a via pillar, removing the first photoresist, forming a second photoresist on the via pillar and the lower conducting layer, etching the second photoresist except on the via pillar and a portion of the lower conducting layer, forming a metal line by removing portions of the lower conducting layer from which the second photoresist has been etched, removing the second photoresist that has not been etched, forming a second insulating layer on the metal line, the first insulating layer, and the via pillar, etching the second insulating layer to expose an upper surface of the via pillar, etching the via pillar to thereby form a via hole through the second insulating layer, and forming an upper conducting layer on the second insulating layer, through the via hole, and in contact with the lower conducting layer.

REFERENCES:
patent: 5187121 (1993-02-01), Cote et al.
patent: 5231054 (1993-07-01), Kosugi
patent: 5233223 (1993-08-01), Murayama
patent: 5275973 (1994-01-01), Gelatos
Wolf, S., Silicon Processing, vol. 2, Lattice Press, 1990, pp. 189-194.

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