Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-05-22
1999-05-04
Bowers, Charles L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438303, 438266, 438637, H01L 21336
Patent
active
058997229
ABSTRACT:
In this invention two side wall spacers are applied to the vertical structure of a gate. The first spacer made of Si.sub.3 N.sub.4 provides for SAC (self aligned contact) definition and the second spacer made of SiO.sub.2 is used for the definition of the LDD (lightly doped drain). The second spacer is the outer spacer and is anisotropically etched when the IPO (inter-poly-oxide) is etched to open a SAC contact area for second level polysilicon deposition. This allows a spacer width for the desired length of the LDD while providing a wider width for SAC contact. The SAC contact is not limited by the LDD spacer and the LDD spacer can be optimized without considering the SAC requirements. This invention is easily applied to SRAMS and DRAMS without extra masking.
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patent: 5208472 (1993-05-01), Su et al.
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patent: 5494838 (1996-02-01), Chang et al.
patent: 5747373 (1998-05-01), Yu
patent: 5763312 (1998-06-01), Jeng et al.
Ackerman Stephen B.
Bowers Charles L.
Chen Jack
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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