Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-23
1999-11-30
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438399, 257303, 257306, H01L 218242, H01L 27108
Patent
active
059941839
ABSTRACT:
A method for forming a high capacitance charge storage structure that can be applied to a substrate wafer having MOS transistor already formed thereon. The method is to form an insulating layer above the substrate wafer. Next, a contact window exposing a source/drain region is formed in the insulating layer. Then, a tungsten suicide layer, which functions as a lower electrode for the charge storage structure, is formed over the substrate. Thereafter, a tungsten nitride layer is formed over the tungsten silicide layer, and then a dielectric layer is formed over the tungsten nitride layer. The dielectric layer is preferably a tantalum oxide layer. Finally, a titanium nitride layer, which functions as an upper electrode for the charge storage structure, is formed over the tantalum oxide layer.
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Hsieh Wen-Yi
Huang Kuo-Tai
Yew Tri-Rung
Monin, Jr. Donald L.
Souw Bernard E.
United Microelectronics Corp.
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