Transistor with local insulator structure

Details Transistor with local insulator structure Transistor with local insulator structure

1998-11-06

2000-07-04

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257510, 257647, H01L 2976, H01L 2994, H01L 3162, H01L 31113, H01L 31119

Patent

active

060842717

ABSTRACT:
A thin filmed fully-depleted silicon-on-insulator (SOI) metal oxide semiconductor field defect transistor (MOSFET) utilizes a local insulation structure. The local insulative structure includes a buried silicon dioxide region under the channel region. The MOSFET body thickness is very small and yet silicon available outside of the channel region and buried silicon dioxide region is available for sufficient depths of silicide in the source and drain regions. The buried silicon dioxide region can be formed by a trench isolation technique or a LOCOS technique.

REFERENCES:
patent: 4507158 (1985-03-01), Kamins et al.
patent: 4523213 (1985-06-01), Konaka et al.
patent: 4885618 (1989-12-01), Schubert et al.
patent: 5463241 (1995-10-01), Kubo
patent: 5554546 (1996-09-01), Malhi
Yu, Bin, "Ultra-Thin-Body Silicon-on-Insulator MOSFET's for Terabit-Scale Integration", Department of Electrical Engineering & Computer Sciences, University of California Berkeley.
Auberton-Herve, "SMART-CUT.RTM.: The Basic Fabrication Process for UNIBOND.RTM. SOI Wafers", IEICE Trans Electron, vol. E80 C. No. 3, Mar. 1997.

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