Data output buffer of a semiconductor memory device

Details Data output buffer of a semiconductor memory device Data output buffer of a semiconductor memory device

1993-10-04

1995-01-24

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, 36523006, 365233, G11C 700

Patent

active

053847350

ABSTRACT:
A semiconductor memory device using a clock of a constant period supplied from the exterior of a memory chip and a sense amplifier for reading out data from a memory cell designated by an address includes at least two different delay circuits for setting at least two delay time periods from the clock, a selecting circuit for receiving signals generated from the delay circuits and selecting one of said signals by a given control signal, and a data output buffer for receiving the data generated from the sense amplifier by a signal generated from the selecting circuit.

REFERENCES:
patent: 4661928 (1987-04-01), Yasuoka
patent: 4663741 (1987-05-01), Reinschmidt et al.

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