Method and structure for machine data storage with simultaneous

Details Method and structure for machine data storage with simultaneous Method and structure for machine data storage with simultaneous

1983-12-30

1986-07-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365174, G11C 700

Patent

active

045997080

ABSTRACT:
Simultaneously timed write and read addresses for data to be respectively written to, and read from, the memory are compared to determine when there is a comparison identity. In response to such a comparison identity, normal read operation is inhibited while at the same time the write data signals are supplied as read data signals.

REFERENCES:
patent: 4193127 (1980-03-01), Gersbach
patent: 4309755 (1982-01-01), Lanty

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