Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-09-29
1999-07-20
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
216 38, 216 85, 438 14, 438 9, 438723, 438743, 438719, H01L 2100
Patent
active
059255757
ABSTRACT:
A process for forming a planarized, insulator, or silicon oxide filled shallow trench has been developed. The process features a hybrid planarization procedure, comprised of an initial dry etching cycle, used to remove all but about 100 to 500 Angstroms of silicon oxide, from subsequent device regions, or regions outside the insulator filled trench. Silicon oxide residing on the insulator filled trench is protected by a photoresist shape. A final chemical mechanical polishing procedure is than employed to remove both the silicon oxide, on the insulator filled shallow trench, as well as removing the remaining silicon oxide on silicon nitride, in subsequent device regions. An endpoint monitoring procedure allows the detection of the remaining 100 to 500 Angstroms of silicon oxide, on silicon nitride. This allows the procedure to be terminated at this stage, thus avoiding gouging or trenching phenomena of insulator in the shallow trench, which can occur due to misalignment of the masking photoresist shape to the underlying insulator filled trench.
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Tao Hun-Jan
Tsai Chia-Shiung
Ackerman Stephen B.
Powell William
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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