Static information storage and retrieval – Read/write circuit – Precharge
Patent
1996-07-08
1998-07-07
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Precharge
365149, 36518909, G11C 800
Patent
active
057779341
ABSTRACT:
A semiconductor memory device achieves high speed operation while operating at a low power supply voltage by boosting the voltage level at the plate node of a memory cell during an access operation. The memory device includes a plate voltage generator which generates a variable voltage level. The plate voltage generator includes a pair of switches for coupling the plate node to either a conventional (1/2)VCC voltage generator or a power supply node in response to a control signal. The plate voltage generator also includes a pulse generator that generates a pulse signal for controlling the switches in response to the control signal. During a precharge period, the bitline pair is charged to VCC. The plate voltage generator charges the plate node to (1/2)VCC during the precharge state and then to VCC during an access operation. This boosts the voltage level at the storage node of the memory cell, thereby decreasing the time required to amplify the signals on the bitlines.
REFERENCES:
patent: 4725985 (1988-02-01), Ogura et al.
patent: 5404325 (1995-04-01), Shibata
patent: 5469395 (1995-11-01), Kuwabara et al.
patent: 5524093 (1996-06-01), Kuroda
patent: 5555526 (1996-09-01), Kim
Lee Sang-Bo
Seo Dong-Il
Nelms David C.
Nguyen Hien
Samsung Electronics Co,. Ltd.
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