4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Specific memory composition

Yasunao Katayama

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Apparatus for encoding and decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Combinational circuit, and encoder, decoder and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Complementary logic circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate

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Decoding circuit, and decoder, decoding method and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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DRAM/SRAM with uniform access time using buffers, write back, ad

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Profile ID: LFUS-PAI-P-524520

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