Complementary logic circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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Details

C257S014000, C257S025000, C257S039000, C257SE29316, C257SE29245, C977S762000, C977S774000

Reexamination Certificate

active

07956348

ABSTRACT:
A quantum device comprises first conductive members and second conductive members confining carriers in the z direction and having two dimensional electron gas on the xy plane. Third conductive members generating an electric field having an effect on the first conductive members. An insulating member easily passing a tunnel current between the first conductive members and the second conductive members. Another insulating member hardly passing a tunnel current between the first conductive members and the third conductive members. An electric field generated by a potential applied to the third conductive members has an effect on the sub-band of the first conductive members.

REFERENCES:
patent: 5401981 (1995-03-01), Michael et al.
patent: 2002/0121636 (2002-09-01), Amin et al.
patent: 2005/0157996 (2005-07-01), McCarthy et al.
patent: 2005/0235027 (2005-10-01), Jung et al.
patent: 07-083111 (1995-09-01), None
Merlari Nano, “Technology Roadmap for Nanoelectronics”, European Commission IST programme Future and Emerging Technologies, Microelectronics Advanced Research Initiative, pp. 1-81.
J.S. Moon, J.A. Simmons, M.A. Blount, W.E. Baca, J.L. Reno and M.J. Hafich, Gate-controlled double electron layer tunneling transistor and single transistor digital logic applications, Electronic Letters, vol. 34, No. 9 (1998).

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