Decoding circuit, and decoder, decoding method and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C708S492000

Reexamination Certificate

active

06928601

ABSTRACT:
A decoding circuit used to correct an error in a digital signal includes: an input unit for entering coded digital signals ID in parallel in accordance with the number of interleaved codes; a processor including an error locator polynomial calculator and an error value polynomial calculator for processing data obtained serially from the interleaved codes that are received by the input unit; and an output unit for correcting errors by employing the output data that are received from the processor and the digital signals ID, and for outputting in parallel the obtained digital signals OD, for which an error has been corrected by a linear calculation on a Galois field, in accordance with the number of interleaved codes.

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patent: 2001/0053225 (2001-12-01), Ohira et al.
Yasuo Sugiyama, The Transactions of the Institute of Electronics and Communication Engineers of Japan, vol. J68-A, No. 11 “On the Algorithm for Solving Yule-Walker Equation Based Upon Euclid Algorithm”, Nov. 25, 1985.
Zhang, Hui-Min and Duhamel, Pierre, On the Methods for Solving Yule-Walker Equations, Dec. 12, 1992, IEEE Transactions on Signal Processing, vol. 40, No. 12, 2987-3000.

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