William M. Lowe

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Cache coherency detection in a bus bridge verification system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Fixed duty cycle clock generator

Pulse or digital communications – Spread spectrum – Direct sequence
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Internal clock signal generation circuit having external clock d

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control
Patent

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Method and apparatus for intrusive testing of a microprocessor f

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Method and apparatus for the operational verification of a micro

Excavating
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Profile ID: LFUS-PAI-P-633962

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