4. Static information storage and retrieval
  5. Read/write circuit
  6. Bad bit

Warren Kurt Howlett

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Cache test sequence for single-ported row repair CAM

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Device to inhibit duplicate cache repairs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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Pseudo random address generator for 0.75M cache

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate

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Read/write eight-slot CAM with interleaving

Static information storage and retrieval – Plural shift register memory devices
Reexamination Certificate

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Repair techniques for memory with multiple redundancy

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2456831

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