Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With specified crystal plane or axis
Inventor
active
Method of applying stresses to PFET and NFET transistor...
Structure and method of applying stresses to PFET and NFET...
Substrate engineering for optimum CMOS device performance
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Profile ID: LFUS-PAI-P-2984882